Part Number Hot Search : 
MM74HC SG2543J A29L800 203295 16F870 1750J F931C105 2SK30
Product Description
Full Text Search
 

To Download LP78092 Datasheet File

  If you can't view the Datasheet, Please click here to try to view without PDF Reader .  
 
 


  Datasheet File OCR Text:
  prelimin ary datasheet lp 78092 lp 78092 C 0 0 version 1.0 feb . - 20 1 4 email : marketing@lowpowersemi.com www.lowpowersemi.com page 1 of 10 1a charge and dual channel ultra - fast cmos ldo regulator general description the lp 78092 is a pmic which ha s 1ch charger and 2 ch ldo with t q fn1 6 package. its charger is a complete constant - current constant voltage linear charger for singl e cell lithium - ion batteries. no external sense resistor is needed, and no blocking diode is required due to the internal mosfet architecture. thermal feedback regulates the charge current to limit the die temperature during high power operation or high am bient temperature. the charge voltage is fixed at 4.2v, and the charge current can be iset rammed externally with a single resistor. the charger automatically terminates the charge cycle when the charge current drops to 1/10th the iset rammed value after t he final float voltage is reached. when the input supply (wall adapter or usb supply) is removed, the lp 78092 automatically enters a low current state, dropping the battery drain current to less than 8 a. other features include charge current monitor, und er voltage lockout, automatic recharge and a status pin to indicate charge termination and the presence of an input voltage. the lp 78092 contains a dual channel, low noise, and low dropout regulator sourcing up to 600ma at each channel. the range of outpu t voltage is from 0.81v to vin by operating from 2.5v to 6 .5v input. lp 78092 offers 2% accuracy, extremely low dropout voltage (280mv @ 400ma), and extremely low ground current, only 75 a per ldo. the shutdown current is near zero current which is suitabl e for battery - power devices. other features include current limiting, over temperature, output short circuit protection. order information lp 78092 f: pb - free package type qv:t q fn - 1 6 features ? charge r : ? programmable charge current up to 1 0 00ma ? no mosfet, sense resistor or blocking diode required ? constant - current/constant - voltage op eration with thermal regulation to maximize charge rate without risk of overheating ? charges single cell li - ion batteries directly from usb port ? 8 a leakage current in shutdown ? drainage charge current thermal regulation status outp uts for led or system interface ? ldo : ? wide operating voltage ranges : 2.5v to 6.0v ? low - noise for rf applications ? high psrr: - 68db at 1khz ? no noise bypass capacitor required ? dual ldo outputs ( 28 0m v / 4 00ma) ? ultra - low quiescent current 75 ua ? built - in short - circuit protection ? consumption available in t q fn - 1 6 package ? rohs compliant and 100% lead (pb) - free marking information applications ? mid/pad ? power bank ? smart phone ? bluetooth applications device marking package shipping lp 78092 qvf qv:t q fn1 6 3k/reel
prelimin ary datasheet lp 78092 lp 78092 C 0 0 version 1.0 feb . - 20 1 4 email : marketing@lowpowersemi.com www.lowpowersemi.com page 2 of 10 functional pin description pack ag e typ e pi n c o n f i g u rat i o n s t q fn - 1 6 pin description pin no. pin description 1 set charge current program, charge current monitor and shutdown pin. the charge current is pro - grammed by connecting a 1% resistor ( r prog )t o ground. when charging in constant - current mode, this pin servos to 2 v. in all modes, the voltage on this pin can be used to measure the charge current using the following formula .lp 78092 : i set =1000/r prog . 2 fb1 f eedback pin for channel 1 ldo. t he reference voltage is 0.8v. 3 en1 e nable pin for channel 1 ldo. a ctive high. 4 gnd g round pin. 5 l v in1 p ow er supply for channel 1 l d o . 6 lout1 o utput pin of channel 1 ldo . 7 lvin2 power supply for channel 2 ldo . 8 lout2 output pin of channel 2 ldo . 9 en2 e nable pin for channel 2 ldo. a ctive high. 10 fb2 f eedback pin for channel 2 ldo. t he reference voltage is 0.8v. 11,12 bvin bvin is the input power source for charger. connect to a wall adapter. 13 bat bat is the connection to the battery. typically a 10f tantalum capacitor is needed for stability when there is no bat tery attached. when a battery is attached, only a 0.1f ceramic capacitor is required. 14 stdby open - drain complete status output. when the battery is charging, the stat pin is pulled high by an internal n - channel mosfet. when the charge cycle is complete d, the pin is pulled low. 15 chrg open - drain charge status output. when the battery is charging, the stat pin is pulled low by an internal n - channel mosfet. when the charge cycle is completed, the pin is pulled high. 16 ce enable charger pin. a ctive hig h. 1 2 3 4 5 6 7 8 9 1 0 1 1 1 2 1 3 1 4 1 5 1 6 s e t f b 1 e n 1 g n d l v i n 1 l o u t 1 l v i n 2 l o u t 2 e n 2 f b 2 b v i n b v i n c h r g c e s t d b y b a t g n d t o p v i e w
prelimin ary datasheet lp 78092 lp 78092 C 0 0 version 1.0 feb . - 20 1 4 email : marketing@lowpowersemi.com www.lowpowersemi.com page 3 of 10 application circuit on off LP78092 gnd fb1 out2 en2 en1 bvin chrgb fb2 out1 lvin2 lvin1 stdby b set bat ce r2 r1 vin cin bat out1 cout1 r3 r4 out2 cout2 rset cbat r0 red green
prelimin ary datasheet lp 78092 lp 78092 C 0 0 version 1.0 feb . - 20 1 4 email : marketing@lowpowersemi.com www.lowpowersemi.com page 4 of 10 function block diagram e n 2 + - l v i n 2 l o u t 2 e r r o r a m p l i f i e r m o s d r i v e r s h u t d o w n a n d l o g i c c o n t r o l f b 2 2 1 3 t a 1 4 5 t d i e c a m a v a c 1 c 2 c 3 r e f 1 . 2 2 v c h r g s h d n t o b a t 2 . 9 v v c c 3 a r 3 1 v r 4 0 . 1 v r 5 s e t r 2 r 1 b a t v c c 5 a 1 2 0 0 x 1 x + + + + + + - - - - - - 1 1 , 1 2 g n d 1 5 1 4 b v i n s t d b y 1 4 e n 1 + - l v i n 1 l o u t 1 v r e f e r r o r a m p l i f i e r m o s d r i v e r c u r r e n t - l i m i t a n d t h e r m a l p r o t e c t i o n s h u t d o w n a n d l o g i c c o n t r o l 5 6 7 8 2 1 0 3 9 f b 1 s c h m i t t 1 6 c e
prelimin ary datasheet lp 78092 lp 78092 C 0 0 version 1.0 feb . - 20 1 4 email : marketing@lowpowersemi.com www.lowpowersemi.com page 5 of 10 absolute maximum ratings ? input voltage to gnd ( l v in 1/2 b vin ) --------------------------- -------------- ---------------------- --------- - 0.3 v to 6.5 v ? vout 1/2 ---------------------------------------------------------- ------------- --------------------------- --- ------------- - 0.3 v to 6 v ? bat, set, stat , en, ce -------- ----- ------------------- -------------- ---------------------- --------------- - 0.3v to v in +0.3v ? bat short - circuit duration ------------------------------- ---------------- --------------------------------------------- continuous ? bat pin current -------------------------------------------- --------------- ---------- - ---- ----------- -- --------------------- 12 00ma ? maximum junction temperature ---------------------- --------------- -- - ---------------------------------------------------- 125c ? operating junction temperature range (t j ) -------------------- ------------- ---------- ----------------------- - 40 to 85 c ? maximum sold ering temperature (at leads, 10 sec) ---------- ------------- -------------------------------------------- 260 c thermal information ? maximum power dissipation (p d ,t a <40 c) -------------------------- ---------------- --------------------- --------------- 1.5 w ? thermal resistance (j a ) --------------------------------------------------------- --------------- -------------- -------------- 6 8 /w
prelimin ary datasheet lp 78092 lp 78092 C 0 0 version 1.0 feb . - 20 1 4 email : marketing@lowpowersemi.com www.lowpowersemi.com page 6 of 10 electrical characteristics (t he specifications which apply over the full operating temperature range, otherwise specifications are at t a =25 c. l v in1/2= b vin = 5v, unless otherwise noted. ) symbol parameter conditions min typ. max units charge v in adapter /usb voltage range 3 .9 5 6 .5 v i cc input supply current charge mode , r set = 10k 300 2000 ua standby mode (charge terminated) 200 50 0 shutdown mode (r set not connected, vcc < v bat , or vcc < v uv ) 25 50 v float regulated output (float) voltage 0c ta 85c, i bat = 40ma 4.158 4.2 4.242 v i bat bat pin current r set = 1 k, current mode 900 10 0 0 1100 ma r set = 2k, current mode 450 500 550 standby mod e, v bat = 4.2v shutdown mode (r set not connected) sleep mode, vcc = 0v 0 - 2.5 1 1 - 6 2 2 ua i tri kl trickle charge current v ba t < v trikl , r set = 2k 5 0 ma v trikl trickle charge threshold voltage r set = 10k, v bat rising 2.8 2.9 3.0 v v trhys trickle charge hysteresis voltage r set = 10k 120 mv v uv vcc under voltage lockout threshold from vcc low to high 3. 9 v v uvhys vcc under voltage lockout hysteresis 150 200 300 mv v asd vcc C v bat lockout threshold voltage vcc from low to high 70 100 140 mv vcc from high to low 5 30 50 mv i term c/10 termination current threshold r set = 10k 0.085 0.10 0.115 ma/ma r set = 2k 0.085 0.10 0.115 ma/ma v set set pin voltage r set = 10k, current mode 2 v v stat stat pin output low voltage i stat = 5ma 0.3 5 0.6 v v restat recharge battery threshold voltage v float - v restat 100 150 200 mv t lim junction temperature in constant temperature mode 145 c r on power fet on resistance (between vcc and bat) 3 00 m v ce l logic - low voltage 0.4 v v ce h logic - high voltage 1.4 ldo v in 1 supply voltage 2.5 6.5 v i load output loading current v en =vin,vin>2.5v 600 ma i lim vfb current limit r load = 1? 750 ma v fb adjustable voltage reference i out =1ma 0.784 0.8 0.816 v i q quiescent current v en 1. 4 v, i out = 0ma 75 130 a v drop dropout voltage i out = 200ma, v out >2.8v 1 4 0 16 0 mv i out = 4 00ma, v out >2.8 v 28 0 32 0 v line line regulation vin = (v out + 1v) to 5.5v, i out = 1ma 0.3 % v load load regulation 1ma < i out < 4 00ma 0.6 % i stby standby current v en = gnd, shutdown 0.01 1 a i en en input bias current v en = 1v or 5v 0.8 5.3 u a v en l logic - low voltage 0.4 v v en h logic - high voltage 1. 4 v n output noise voltage 10hz to 100khz, iout = 200ma , cout = 1f 100 u v rms t sd thermal shutdown temperature 1 50 c
prelimin ary datasheet lp 78092 lp 78092 C 0 0 version 1.0 feb . - 20 1 4 email : marketing@lowpowersemi.com www.lowpowersemi.com page 7 of 10 charge characteristics
prelimin ary datasheet lp 78092 lp 78092 C 0 0 version 1.0 feb . - 20 1 4 email : marketing@lowpowersemi.com www.lowpowersemi.com page 8 of 10 application information the lp 78092 is a sin gle cell lithium - ion battery charger using a constant - current/constant - voltage algorithm. it can deliver up to 1 0 00ma of charge current (using a good thermal pcb layout) with a final float voltage accuracy of 1%. the lp 78092 includes an internal p - channel power mosfet and thermal regulation circuitry. no blocking diode or external current sense resistor is required; thus, the basic charger circuit requires only two external com ponents. furthermore, the lp 78092 is capable of operat ing from a usb power sou rce. f o r l d o p a r t , l ike any low - dropout regulator, the external capacitors used with the lp 78092 must be carefully selected for regulator stability and performance. using a capacitor whose value is > 2 f on the lp 78092 input and the amount of capacitance can be increased without limit. the input capacitor must be located a distance of not more than 0.5 inch from the input pin of the ic and returned to a clean analog ground. t here is a special attention which is the input capacitance should not be less than output capacitance. any good quality ceramic or tantalum can be used for this ca pacitor. the capacitor with larger value and lower esr (equivalent series resistance) provides better psrr and line - transient response. the output capacitor must meet both requirements for minimum amount of capacitance and esr in all ldos application. the lp 78092 is designed specifically to work with low esr ceramic output capacitor in space - saving and performance consideration. using a ceramic capacitor whose value is at least 1 f with esr is > 25m ? on the lp 78092 output ensures stability. the lp 78092 still works well with output capacitor of other types due to the wide stable esr range. output capacitor of larger capacitance can reduce noise and improve load transient response, stability, and psrr. the output capacitor should be located not more than 0.5 inch from the v out pin of the lp 78092 and returned to a clean analog ground. normal charge cycle a charge cycle begins when the voltage at the v in pin rises above the uvlo threshold level and a 1% set ram resistor is connected from the set pin to ground or when a battery is connected to the charger output. if the bat pin is less than 2.9v, the charger enters trickle charge mode. in this mode, the lp 78092 supplies approximately 1/10 the set rammed charge current to bring the battery volt age up to a safe level for full current charging. when the bat pin voltage rises above 2 .9v, the charger enters constant - current mode, where the set rammed charge current is supplied to the battery. when the bat pin approaches the final float voltage (4.2v), the lp 78092 enters constant - voltage mode and the charge current begins to decrease. w hen the charg e current drops to 1/10 of the set rammed value, the charge cycle ends. r set ramming charge current the charge current is set rammed using a single resistor from the set pin to ground. the battery charge current is 5 00 times the current out of the set pin. the set ram resistor and the charge current are calculated using the following equations: lp 78092 : rset= 1 0 00 v/ichg ichg= 1 0 00 v/rset the charge current out of the bat pin can be determined at any time by monitoring the set pin voltage using the following equation: ibat= vset x 5 0 0/rset note: vset is 2v olts . charge termination a charge cycle is term inated when the charge current falls to 1/10th the set rammed value after the final float voltage is reached. this condition is detected by using an internal, fil tered comparator to monitor the set pin. when the set pin voltage falls below 100mv for longer than t term (typically 1ms), charging is terminated. the charge current is latched off and the lp 78092 enters standby mode, where the input supply current drops to 200a. (note: c/10 termination is disabled in trickle charging and thermal limiting modes). when charging, transient loads on the bat pin can cause the set pin to fall below 2 00mv for short periods of time before the dc charge current has dropped to 1/10th the set rammed value. the 1ms filter time (t term ) on the termination comparator ensures th at transient loads of this nature do not result in premature charge cycle termi nation. once the average charge current drops below 1/10th the set rammed value, the lp 78092 terminates the charge cycle and ceases to provide any current through the bat pin. in this state, all loads on the bat pin must be supplied by the battery.
prelimin ary datasheet lp 78092 lp 78092 C 0 0 version 1.0 feb . - 20 1 4 email : marketing@lowpowersemi.com www.lowpowersemi.com page 9 of 10 the lp 78092 constantly monitors the bat pin voltage in standby mode. if this voltage drops below the 4.05v recharge threshold (v re stat ), another charge cycle be gins and current is o nce again supplied to the battery. to manually restart a charge cycle when in standby mode, the input voltage must be removed and reapplied, or the charger must be shut down and restarted using the set pin. figure 2 shows the state diagram of a typ ical charge cycle. charge status indicator ( stat ) the charge status output has two d ifferent st ates: strong pull - down (~10ma) and high impedance. the strong pull - down state indicates that the lp 78092 is in a charge cycle. once the charge cycle has termin ated, the pin state is determined by under voltage lockout conditions. high impedance indicates that the lp 78092 is in under voltage lockout mode: either v in is less than 100mv above the bat pin voltage or insufficient voltage is applied to the v in pin. a microprocessor can be used to distin guish between these t wo states this method is dis cussed in the applications information section. function chrg (pin 15 ) stdby (pin 14 ) charging low high charge completed high low thermal limiting an internal the rmal feedback loop reduces the iset rammed charge current if the die temperature attempts to rise above a preset value of approximately 120c. this feature protects the lp 78092 from excessive temperature and allows the user to push the limits of the power handling capability of a given circuit board without risk of damaging the lp 78092 . the charge current can be set according to typical (not worst - case) ambient temperature with the assurance that the charger will automatically reduce the current in worst - ca se conditions. t qfn - 16 power consid erations are discussed further in the applications informa tion section. automatic recharge once the charge cycle is terminated, the lp 78092 continu ously monitors the voltage on the bat pin using a com parator with a 2ms filter time (t recharge ). a charge cycle restarts when the battery voltage falls below 4.05v (which corresponds to approximately 80% to 90% battery capac ity). this ensures that the battery is kept at or near a fully charged condition and eliminates the nee d for periodic charge cycle initiations. stat output enters a strong pull - down state during recharge cycles. s tart - up function the lp 78092 features an ldo regulator enable/disable function. to assure the ldo regulator will switch o n, the en turn on control level must be greater than 1. 4 volts but not above vin+0.3v . the ldo regulator will go into the shutdown mode when the voltage on the en pin falls below 0.4 volts. for protecting the system, the lp 78092 have a quick - discharge func tion. if the enable function is not needed in a specific application, it may be tied to vin to keep the ldo regulator in a continuously on state. feedback capacitor a n d v o l t a g e f or adjustable version, c onnecting a 22 p f between output pin and fb pin significantly redu ces output voltage ripple , it is critical that the capacitor connection should be direct and pcb traces should be as short as possible. t h e o u t p u t v o l t a g e o f d u a l l d o c o u l d b e s e t b y t h e f o r m u l a b e l o w : v o u t = v f b 1 +r 1 /r2 which v fb = 0 . 8v c onsider ing the prac tical application , we may add a small capacitor with r 1 in parallel w h i c h c o u l d b e 3 3 p f o r 4 7 p f .
prelimin ary datasheet lp 78092 lp 78092 C 0 0 version 1.0 feb . - 20 1 4 email : marketing@lowpowersemi.com www.lowpowersemi.com page 10 of 10 packag ing information t q fn - 1 6


▲Up To Search▲   

 
Price & Availability of LP78092

All Rights Reserved © IC-ON-LINE 2003 - 2022  

[Add Bookmark] [Contact Us] [Link exchange] [Privacy policy]
Mirror Sites :  [www.datasheet.hk]   [www.maxim4u.com]  [www.ic-on-line.cn] [www.ic-on-line.com] [www.ic-on-line.net] [www.alldatasheet.com.cn] [www.gdcy.com]  [www.gdcy.net]


 . . . . .
  We use cookies to deliver the best possible web experience and assist with our advertising efforts. By continuing to use this site, you consent to the use of cookies. For more information on cookies, please take a look at our Privacy Policy. X